refactor(core): introduce USE_BACKUP_DOMAIN_RETENTION
What changed, and why it matters
This commit renames a hardware configuration flag from USE_BACKUP_RAM to USE_BACKUP_DOMAIN_RETENTION and enables it for three Trezor T3W1 hardware revisions. It appears to be a code cleanup/refactor to make startup power-retention behavior match the actual hardware capability on these boards. There is no direct evidence in the commit that this fixes a security vulnerability.
Treat as a normal hardware-configuration refactor. Review whether backup domain retention has any implications for secrets held in backup RAM across resets or power events, but do not assume a security vulnerability based solely on this diff.
Security signals we found
Changes low-level power/retention configuration in startup code
No changelog entry provided
No explicit security context in commit message or diff
Evidence from the diff
The change introduces a new board-level macro USE_BACKUP_DOMAIN_RETENTION in three T3W1 board headers and switches the STM32U5 startup code’s backup-domain retention enable from USE_BACKUP_RAM to USE_BACKUP_DOMAIN_RETENTION. The comment notes the bit can only be written when the regulator is in LDO mode, which is configured before switching to SMPS. This is a build-time configuration refactor; the functional effect is enabling backup domain retention on T3W1 revA/revB/revC. No changelog entry is present and no security context is provided.
Changed components
core/embed/models/T3W1/boards/trezor_t3w1_revA.hcore/embed/models/T3W1/boards/trezor_t3w1_revB.hcore/embed/models/T3W1/boards/trezor_t3w1_revC.hcore/embed/sys/startup/stm32u5/startup_init.cInspect captured patch +4 / −1
diff --git a/core/embed/models/T3W1/boards/trezor_t3w1_revA.h b/core/embed/models/T3W1/boards/trezor_t3w1_revA.h
index ed5819e6..bdd4501e 100644
--- a/core/embed/models/T3W1/boards/trezor_t3w1_revA.h
+++ b/core/embed/models/T3W1/boards/trezor_t3w1_revA.h
@@ -2,6 +2,7 @@
#define VDD_1V8 1
#define USE_SMPS 1
+#define USE_BACKUP_DOMAIN_RETENTION 1
#define BTN_POWER_PIN GPIO_PIN_5
#define BTN_POWER_PORT GPIOE
diff --git a/core/embed/models/T3W1/boards/trezor_t3w1_revB.h b/core/embed/models/T3W1/boards/trezor_t3w1_revB.h
index 80fabd7a..5d02ea2d 100644
--- a/core/embed/models/T3W1/boards/trezor_t3w1_revB.h
+++ b/core/embed/models/T3W1/boards/trezor_t3w1_revB.h
@@ -2,6 +2,7 @@
#define VDD_1V8 1
#define USE_SMPS 1
+#define USE_BACKUP_DOMAIN_RETENTION 1
#define BTN_POWER_PIN GPIO_PIN_5
#define BTN_POWER_PORT GPIOE
diff --git a/core/embed/models/T3W1/boards/trezor_t3w1_revC.h b/core/embed/models/T3W1/boards/trezor_t3w1_revC.h
index 7f43de2a..e8f2fc92 100644
--- a/core/embed/models/T3W1/boards/trezor_t3w1_revC.h
+++ b/core/embed/models/T3W1/boards/trezor_t3w1_revC.h
@@ -2,6 +2,7 @@
#define VDD_1V8 1
#define USE_SMPS 1
+#define USE_BACKUP_DOMAIN_RETENTION 1
#define BTN_POWER_PIN GPIO_PIN_5
#define BTN_POWER_PORT GPIOE
diff --git a/core/embed/sys/startup/stm32u5/startup_init.c b/core/embed/sys/startup/stm32u5/startup_init.c
index c6ac1035..850abfe5 100644
--- a/core/embed/sys/startup/stm32u5/startup_init.c
+++ b/core/embed/sys/startup/stm32u5/startup_init.c
@@ -258,7 +258,7 @@ void SystemInit(void) {
// Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
HAL_PWREx_DisableUCPDDeadBattery();
-#ifdef USE_BACKUP_RAM
+#ifdef USE_BACKUP_DOMAIN_RETENTION
// Enable backup domain retention
// This bit can be written only when the regulator is LDO,
// which must be configured before switching to SMPS.
Why this scored 11/100
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