refactor(core): move option_bytes to sec layer

diff --git a/core/embed/projects/boardloader/main.c b/core/embed/projects/boardloader/main.c
index 4bb2c3f3b..020ac1857 100644
--- a/core/embed/projects/boardloader/main.c
+++ b/core/embed/projects/boardloader/main.c
@@ -22,6 +22,7 @@
 
 #include <io/display.h>
 #include <sec/board_capabilities.h>
+#include <sec/option_bytes.h>
 #include <sec/secret.h>
 #include <sys/bootutils.h>
 #include <sys/reset_flags.h>
@@ -29,7 +30,6 @@
 #include <sys/system.h>
 #include <sys/systick.h>
 #include <util/flash.h>
-#include <util/option_bytes.h>
 #include <util/rsod.h>
 
 #ifdef USE_BOOT_UCB
diff --git a/core/embed/projects/kernel/main.c b/core/embed/projects/kernel/main.c
index 0b6e14a63..3e7848c6d 100644
--- a/core/embed/projects/kernel/main.c
+++ b/core/embed/projects/kernel/main.c
@@ -23,6 +23,7 @@
 #include <gfx/gfx_bitblt.h>
 #include <io/display.h>
 #include <sec/board_capabilities.h>
+#include <sec/option_bytes.h>
 #include <sec/random_delays.h>
 #include <sec/secret.h>
 #include <sec/secure_aes.h>
@@ -35,7 +36,6 @@
 #include <sys/system.h>
 #include <sys/systick.h>
 #include <util/boot_image.h>
-#include <util/option_bytes.h>
 #include <util/rsod.h>
 
 #ifdef USE_BUTTON
diff --git a/core/embed/projects/secmon/main.c b/core/embed/projects/secmon/main.c
index b6832b796..a332aacd5 100644
--- a/core/embed/projects/secmon/main.c
+++ b/core/embed/projects/secmon/main.c
@@ -21,6 +21,7 @@
 #include <trezor_model.h>
 
 #include <sec/board_capabilities.h>
+#include <sec/option_bytes.h>
 #include <sec/random_delays.h>
 #include <sec/secure_aes.h>
 #include <sec/unit_properties.h>
@@ -30,7 +31,6 @@
 #include <sys/sysutils.h>
 #include <util/boot_image.h>
 #include <util/flash.h>
-#include <util/option_bytes.h>
 
 #ifdef USE_BACKUP_RAM
 #include <sec/backup_ram.h>
diff --git a/core/embed/sec/option_bytes/inc/sec/option_bytes.h b/core/embed/sec/option_bytes/inc/sec/option_bytes.h
new file mode 100644
index 000000000..d48900a53
--- /dev/null
+++ b/core/embed/sec/option_bytes/inc/sec/option_bytes.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the Trezor project, https://trezor.io/
+ *
+ * Copyright (c) SatoshiLabs
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef TREZORHAL_OPTION_BYTES_H
+#define TREZORHAL_OPTION_BYTES_H
+
+#include <trezor_types.h>
+
+#ifdef KERNEL_MODE
+
+secbool flash_check_option_bytes(void);
+void flash_lock_option_bytes(void);
+void flash_unlock_option_bytes(void);
+uint32_t flash_set_option_bytes(void);
+secbool flash_configure_option_bytes(void);
+
+void check_oem_keys(void);
+
+#endif  // KERNEL_MODE
+
+#endif  // TREZORHAL_OPTION_BYTES_H
diff --git a/core/embed/sec/option_bytes/stm32f4/option_bytes.c b/core/embed/sec/option_bytes/stm32f4/option_bytes.c
new file mode 100644
index 000000000..43fcf4322
--- /dev/null
+++ b/core/embed/sec/option_bytes/stm32f4/option_bytes.c
@@ -0,0 +1,155 @@
+/*
+ * This file is part of the Trezor project, https://trezor.io/
+ *
+ * Copyright (c) SatoshiLabs
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <trezor_bsp.h>
+
+#include <sec/option_bytes.h>
+#include <sys/mpu.h>
+#include <util/flash_otp.h>
+
+#ifdef KERNEL_MODE
+
+#pragma GCC optimize( \
+    "no-stack-protector")  // applies to all functions in this file
+
+#if PRODUCTION
+#define WANT_RDP_LEVEL (OB_RDP_LEVEL_2)
+#define WANT_WRP_SECTORS (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
+#else
+#define WANT_RDP_LEVEL (OB_RDP_LEVEL_0)
+#define WANT_WRP_SECTORS (0)
+#endif
+
+// BOR LEVEL 3: Reset level threshold is around 2.5 V
+#define WANT_BOR_LEVEL (OB_BOR_LEVEL3)
+
+// reference RM0090 section 3.9.10; SPRMOD is 0 meaning PCROP disabled.; DB1M is
+// 0 because we use 2MB dual-bank; BFB2 is 0 allowing boot from flash;
+#define FLASH_OPTCR_VALUE                                                   \
+  ((((~WANT_WRP_SECTORS) << FLASH_OPTCR_nWRP_Pos) & FLASH_OPTCR_nWRP_Msk) | \
+   (WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) | FLASH_OPTCR_nRST_STDBY |       \
+   FLASH_OPTCR_nRST_STOP | FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL)
+
+// reference RM0090 section 3.7.1 table 16
+#define OPTION_BYTES_RDP_USER_VALUE                            \
+  ((uint16_t)((WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) |        \
+              FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_nRST_STOP | \
+              FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL))
+#define OPTION_BYTES_BANK1_WRP_VALUE ((uint16_t)((~WANT_WRP_SECTORS) & 0xFFFU))
+#define OPTION_BYTES_BANK2_WRP_VALUE ((uint16_t)0xFFFU)
+
+// reference RM0090 section 3.7.1 table 16. use 16 bit pointers because the top
+// 48 bits are all reserved.
+#define OPTION_BYTES_RDP_USER (*(volatile uint16_t* const)0x1FFFC000U)
+#define OPTION_BYTES_BANK1_WRP (*(volatile uint16_t* const)0x1FFFC008U)
+#define OPTION_BYTES_BANK2_WRP (*(volatile uint16_t* const)0x1FFEC008U)
+
+#define FLASH_STATUS_ALL_FLAGS                                            \
+  (FLASH_SR_RDERR | FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR | \
+   FLASH_SR_WRPERR | FLASH_SR_SOP | FLASH_SR_EOP)
+
+static uint32_t flash_wait_and_clear_status_flags(void) {
+  while (FLASH->SR & FLASH_SR_BSY)
+    ;  // wait for all previous flash operations to complete
+  const uint32_t result =
+      FLASH->SR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
+  FLASH->SR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
+  return result;
+}
+
+secbool flash_check_option_bytes(void) {
+  flash_wait_and_clear_status_flags();
+  // check values stored in flash interface registers
+  if ((FLASH->OPTCR & ~3) !=
+      FLASH_OPTCR_VALUE) {  // ignore bits 0 and 1 because they are control bits
+    return secfalse;
+  }
+  if (FLASH->OPTCR1 != FLASH_OPTCR1_nWRP) {
+    return secfalse;
+  }
+
+  mpu_mode_t mode = mpu_reconfig(MPU_MODE_FLASHOB);
+  // check values stored in flash memory
+  if ((OPTION_BYTES_RDP_USER & ~3) !=
+      OPTION_BYTES_RDP_USER_VALUE) {  // bits 0 and 1 are unused
+    mpu_reconfig(mode);
+    return secfalse;
+  }
+  if ((OPTION_BYTES_BANK1_WRP & 0xCFFFU) !=
+      OPTION_BYTES_BANK1_WRP_VALUE) {  // bits 12 and 13 are unused
+    mpu_reconfig(mode);
+    return secfalse;
+  }
+  if ((OPTION_BYTES_BANK2_WRP & 0xFFFU) !=
+      OPTION_BYTES_BANK2_WRP_VALUE) {  // bits 12, 13, 14, and 15 are unused
+    mpu_reconfig(mode);
+    return secfalse;
+  }
+
+  mpu_reconfig(mode);
+
+  return sectrue;
+}
+
+void flash_lock_option_bytes(void) {
+  FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;  // lock the option bytes
+}
+
+void flash_unlock_option_bytes(void) {
+  if ((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) == 0) {
+    return;  // already unlocked
+  }
+  // reference RM0090 section 3.7.2
+  // write the special sequence to unlock
+  FLASH->OPTKEYR = FLASH_OPT_KEY1;
+  FLASH->OPTKEYR = FLASH_OPT_KEY2;
+  while (FLASH->OPTCR & FLASH_OPTCR_OPTLOCK)
+    ;  // wait until the flash option control register is unlocked
+}
+
+uint32_t flash_set_option_bytes(void) {
+  // reference RM0090 section 3.7.2
+  flash_wait_and_clear_status_flags();
+  flash_unlock_option_bytes();
+  flash_wait_and_clear_status_flags();
+  FLASH->OPTCR1 =
+      FLASH_OPTCR1_nWRP;  // no write protection on any sectors in bank 2
+  FLASH->OPTCR =
+      FLASH_OPTCR_VALUE;  // WARNING: dev board safe unless you compile for
+                          // PRODUCTION or change this value!!!
+  FLASH->OPTCR |= FLASH_OPTCR_OPTSTRT;  // begin committing changes to flash
+  const uint32_t result =
+      flash_wait_and_clear_status_flags();  // wait until changes are committed
+  flash_lock_option_bytes();
+  return result;
+}
+
+secbool flash_configure_option_bytes(void) {
+  if (sectrue == flash_check_option_bytes()) {
+    return sectrue;  // we DID NOT have to change the option bytes
+  }
+
+  do {
+    flash_set_option_bytes();
+  } while (sectrue != flash_check_option_bytes());
+
+  return secfalse;  // notify that we DID have to change the option bytes
+}
+
+#endif  // #ifdef KERNEL_MODE
diff --git a/core/embed/sec/option_bytes/stm32u5/option_bytes.c b/core/embed/sec/option_bytes/stm32u5/option_bytes.c
new file mode 100644
index 000000000..c4d53bb52
--- /dev/null
+++ b/core/embed/sec/option_bytes/stm32u5/option_bytes.c
@@ -0,0 +1,266 @@
+/*
+ * This file is part of the Trezor project, https://trezor.io/
+ *
+ * Copyright (c) SatoshiLabs
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <trezor_bsp.h>
+#include <trezor_model.h>
+#include <trezor_rtl.h>
+
+#ifdef SECURE_MODE
+
+#include <sec/option_bytes.h>
+#include <util/flash.h>
+
+#pragma GCC optimize( \
+    "no-stack-protector")  // applies to all functions in this file
+
+#if PRODUCTION
+#define WANT_RDP_LEVEL (OB_RDP_LEVEL_2)
+#define WANT_WRP_PAGE_START BOARDLOADER_SECTOR_START
+#define WANT_WRP_PAGE_END BOARDLOADER_SECTOR_END
+#else
+#define WANT_RDP_LEVEL (OB_RDP_LEVEL_0)
+#endif
+
+#ifdef VDD_3V3
+// BOR LEVEL 0: Reset level threshold is around 2.8 V
+#define WANT_BOR_LEVEL (OB_BOR_LEVEL_4)
+#elif VDD_1V8
+// BOR LEVEL 0: Reset level threshold is around 1.7 V
+#define WANT_BOR_LEVEL (OB_BOR_LEVEL_0)
+#else
+#error "VDD_3V3 or VDD_1V8 must be defined"
+#endif
+
+#if defined STM32U5A9xx | defined STM32U5G9xx
+#define WRP_DEFAULT_VALUE 0xFF00FFFF
+#define SEC_WM1R1_DEFAULT_VALUE 0xFF00FF00
+#define SEC_WM1R2_DEFAULT_VALUE 0x7F007F00
+#define SEC_AREA_2_PAGE_START 0xFF
+#define SEC_AREA_2_PAGE_END 0x00
+#elif defined STM32U585xx
+#define WRP_DEFAULT_VALUE 0xFF80FFFF
+#define SEC_WM1R1_DEFAULT_VALUE 0xFF80FF80
+#define SEC_WM1R2_DEFAULT_VALUE 0x7F807F80
+#define SEC_AREA_2_PAGE_START 0x7F
+#define SEC_AREA_2_PAGE_END 0x00
+#else
+#error Unknown MCU
+#endif
+
+_Static_assert(SECRET_SECTOR_START == 0, "secret sector start must be 0");
+#define SEC_AREA_1_PAGE_START SECRET_SECTOR_START
+#define HDP_AREA_1_PAGE_END SECRET_SECTOR_END
+#define SEC_AREA_1_PAGE_END BOARDLOADER_SECTOR_END
+
+#define WRP_LOCKED_VALUE                                       \
+  ((WRP_DEFAULT_VALUE &                                        \
+    ~(FLASH_WRP1AR_UNLOCK_Msk | FLASH_WRP1AR_WRP1A_PSTRT_Msk | \
+      FLASH_WRP1AR_WRP1A_PEND_Msk)) |                          \
+   (WANT_WRP_PAGE_START << FLASH_WRP1AR_WRP1A_PSTRT_Pos) |     \
+   (WANT_WRP_PAGE_END << FLASH_WRP1AR_WRP1A_PEND_Pos))
+
+#define FLASH_OPTR_VALUE                                                \
+  (FLASH_OPTR_TZEN | FLASH_OPTR_PA15_PUPEN | FLASH_OPTR_nBOOT0 |        \
+   FLASH_OPTR_SRAM3_ECC | FLASH_OPTR_DUALBANK | FLASH_OPTR_WWDG_SW |    \
+   FLASH_OPTR_IWDG_STOP | FLASH_OPTR_IWDG_STDBY | FLASH_OPTR_IWDG_SW |  \
+   FLASH_OPTR_SRAM_RST | FLASH_OPTR_nRST_SHDW | FLASH_OPTR_nRST_STDBY | \
+   FLASH_OPTR_nRST_STOP | WANT_BOR_LEVEL |                              \
+   (WANT_RDP_LEVEL << FLASH_OPTR_RDP_Pos))
+
+#define FALSH_SECBOOTADD0R_VALUE \
+  ((BOARDLOADER_START & 0xFFFFFF80) | FLASH_SECBOOTADD0R_BOOT_LOCK | 0x7C)
+
+#define FLASH_SECWM1R1_VALUE                                  \
+  (SEC_AREA_1_PAGE_START << FLASH_SECWM1R1_SECWM1_PSTRT_Pos | \
+   SEC_AREA_1_PAGE_END << FLASH_SECWM1R1_SECWM1_PEND_Pos |    \
+   SEC_WM1R1_DEFAULT_VALUE)
+#define FLASH_SECWM1R2_VALUE                             \
+  (HDP_AREA_1_PAGE_END << FLASH_SECWM1R2_HDP1_PEND_Pos | \
+   FLASH_SECWM1R2_HDP1EN | SEC_WM1R2_DEFAULT_VALUE)
+
+#define FLASH_SECWM2R1_VALUE                                  \
+  (SEC_AREA_2_PAGE_START << FLASH_SECWM1R1_SECWM1_PSTRT_Pos | \
+   SEC_AREA_2_PAGE_END << FLASH_SECWM1R1_SECWM1_PEND_Pos |    \
+   SEC_WM1R1_DEFAULT_VALUE)
+#define FLASH_SECWM2R2_VALUE (SEC_WM1R2_DEFAULT_VALUE)
+
+#define FLASH_STATUS_ALL_FLAGS \
+  (FLASH_NSSR_PGSERR | FLASH_NSSR_PGAERR | FLASH_NSSR_WRPERR | FLASH_NSSR_EOP)
+
+static uint32_t flash_wait_and_clear_status_flags(void) {
+  while (FLASH->NSSR & FLASH_NSSR_BSY)
+    ;  // wait for all previous flash operations to complete
+
+  uint32_t result =
+      FLASH->NSSR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
+  FLASH->NSSR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
+
+#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  while (FLASH->SECSR & FLASH_SECSR_BSY)
+    ;  // wait for all previous flash operations to complete
+  result |=
+      FLASH->SECSR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
+  FLASH->SECSR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
+#endif
+  return result;
+}
+
+secbool flash_check_option_bytes(void) {
+  flash_wait_and_clear_status_flags();
+  // check values stored in flash interface registers
+  if (FLASH->OPTR !=
+      FLASH_OPTR_VALUE) {  // ignore bits 0 and 1 because they are control bits
+    return secfalse;
+  }
+
+  if (FLASH->SECBOOTADD0R != FALSH_SECBOOTADD0R_VALUE) {
+    return secfalse;
+  }
+
+#if PRODUCTION
+  if (FLASH->WRP1AR != WRP_LOCKED_VALUE) {
+    return secfalse;
+  }
+#else
+  if (FLASH->WRP1AR != WRP_DEFAULT_VALUE) {
+    return secfalse;
+  }
+#endif
+
+  if (FLASH->WRP1BR != WRP_DEFAULT_VALUE) {
+    return secfalse;
+  }
+  if (FLASH->WRP2AR != WRP_DEFAULT_VALUE) {
+    return secfalse;
+  }
+  if (FLASH->WRP2BR != WRP_DEFAULT_VALUE) {
+    return secfalse;
+  }
+
+  if (FLASH->SECWM1R1 != FLASH_SECWM1R1_VALUE) {
+    return secfalse;
+  }
+  if (FLASH->SECWM1R2 != FLASH_SECWM1R2_VALUE) {
+    return secfalse;
+  }
+  if (FLASH->SECWM2R1 != FLASH_SECWM2R1_VALUE) {
+    return secfalse;
+  }
+  if (FLASH->SECWM2R2 != FLASH_SECWM2R2_VALUE) {
+    return secfalse;
+  }
+
+  return sectrue;
+}
+
+void flash_lock_option_bytes(void) {
+  FLASH->NSCR |= FLASH_NSCR_OPTLOCK;  // lock the option bytes
+}
+
+void flash_unlock_option_bytes(void) {
+  if ((FLASH->NSCR & FLASH_NSCR_OPTLOCK) == 0) {
+    return;  // already unlocked
+  }
+  // reference RM0090 section 3.7.2
+  // write the special sequence to unlock
+  FLASH->OPTKEYR = FLASH_OPTKEY1;
+  FLASH->OPTKEYR = FLASH_OPTKEY2;
+  while (FLASH->NSCR & FLASH_NSCR_OPTLOCK)
+    ;  // wait until the flash option control register is unlocked
+}
+
+uint32_t flash_set_option_bytes(void) {
+  if (flash_unlock_write() != sectrue) {
+    return 0;
+  }
+  flash_wait_and_clear_status_flags();
+  flash_unlock_option_bytes();
+  flash_wait_and_clear_status_flags();
+
+  FLASH->SECBOOTADD0R = FALSH_SECBOOTADD0R_VALUE;
+
+  FLASH->SECWM1R1 = FLASH_SECWM1R1_VALUE;
+  FLASH->SECWM1R2 = FLASH_SECWM1R2_VALUE;
+
+  FLASH->SECWM2R1 = FLASH_SECWM2R1_VALUE;
+  FLASH->SECWM2R2 = FLASH_SECWM2R2_VALUE;
+
+#if PRODUCTION
+  FLASH->WRP1AR = WRP_LOCKED_VALUE;
+#else
+  FLASH->WRP1AR = WRP_DEFAULT_VALUE;
+#endif
+  FLASH->WRP1BR = WRP_DEFAULT_VALUE;
+  FLASH->WRP2AR = WRP_DEFAULT_VALUE;
+  FLASH->WRP2BR = WRP_DEFAULT_VALUE;
+
+  // Set the OEM keys to the default value
+  // In case these are for any reason set, we will reset them to the default
+  // while locking the device, to ensure that there is no ability to reverse the
+  // RDP. These keys are write-only, so the only way to check that the keys are
+  // not set is through OEMxLOCK bits in FLASH->NSSR register. These bits are
+  // unset only if the keys are written to 0xFFFFFFFF.
+  FLASH->OEM1KEYR1 = 0xFFFFFFFF;
+  FLASH->OEM1KEYR2 = 0xFFFFFFFF;
+  FLASH->OEM2KEYR1 = 0xFFFFFFFF;
+  FLASH->OEM2KEYR2 = 0xFFFFFFFF;
+
+  FLASH->OPTR =
+      FLASH_OPTR_VALUE;  // WARNING: dev board safe unless you compile for
+  // PRODUCTION or change this value!!!
+
+  FLASH_WaitForLastOperation(HAL_MAX_DELAY);
+
+  FLASH->NSCR |= FLASH_NSCR_OPTSTRT;
+  uint32_t result =
+      flash_wait_and_clear_status_flags();  // wait until changes are committed
+
+  FLASH_WaitForLastOperation(HAL_MAX_DELAY);
+
+  FLASH->NSCR |= FLASH_NSCR_OBL_LAUNCH;  // begin committing changes to flash
+  result =
+      flash_wait_and_clear_status_flags();  // wait until changes are committed
+  flash_lock_option_bytes();
+
+  if (flash_lock_write() != sectrue) {
+    return 0;
+  }
+  return result;
+}
+
+void check_oem_keys(void) {
+  ensure(((FLASH->NSSR & FLASH_NSSR_OEM1LOCK) == 0) * sectrue, "OEM1 KEY SET");
+  ensure(((FLASH->NSSR & FLASH_NSSR_OEM2LOCK) == 0) * sectrue, "OEM2 KEY SET");
+}
+
+secbool flash_configure_option_bytes(void) {
+  if (sectrue == flash_check_option_bytes()) {
+    return sectrue;  // we DID NOT have to change the option bytes
+  }
+
+  do {
+    flash_set_option_bytes();
+  } while (sectrue != flash_check_option_bytes());
+
+  check_oem_keys();
+
+  return secfalse;  // notify that we DID have to change the option bytes
+}
+
+#endif  // SECURE_MODE
diff --git a/core/embed/util/option_bytes/inc/util/option_bytes.h b/core/embed/util/option_bytes/inc/util/option_bytes.h
deleted file mode 100644
index d48900a53..000000000
--- a/core/embed/util/option_bytes/inc/util/option_bytes.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the Trezor project, https://trezor.io/
- *
- * Copyright (c) SatoshiLabs
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef TREZORHAL_OPTION_BYTES_H
-#define TREZORHAL_OPTION_BYTES_H
-
-#include <trezor_types.h>
-
-#ifdef KERNEL_MODE
-
-secbool flash_check_option_bytes(void);
-void flash_lock_option_bytes(void);
-void flash_unlock_option_bytes(void);
-uint32_t flash_set_option_bytes(void);
-secbool flash_configure_option_bytes(void);
-
-void check_oem_keys(void);
-
-#endif  // KERNEL_MODE
-
-#endif  // TREZORHAL_OPTION_BYTES_H
diff --git a/core/embed/util/option_bytes/stm32f4/option_bytes.c b/core/embed/util/option_bytes/stm32f4/option_bytes.c
deleted file mode 100644
index f3327dc71..000000000
--- a/core/embed/util/option_bytes/stm32f4/option_bytes.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * This file is part of the Trezor project, https://trezor.io/
- *
- * Copyright (c) SatoshiLabs
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <trezor_bsp.h>
-
-#include <sys/mpu.h>
-#include <util/flash_otp.h>
-#include <util/option_bytes.h>
-
-#ifdef KERNEL_MODE
-
-#pragma GCC optimize( \
-    "no-stack-protector")  // applies to all functions in this file
-
-#if PRODUCTION
-#define WANT_RDP_LEVEL (OB_RDP_LEVEL_2)
-#define WANT_WRP_SECTORS (OB_WRP_SECTOR_0 | OB_WRP_SECTOR_1 | OB_WRP_SECTOR_2)
-#else
-#define WANT_RDP_LEVEL (OB_RDP_LEVEL_0)
-#define WANT_WRP_SECTORS (0)
-#endif
-
-// BOR LEVEL 3: Reset level threshold is around 2.5 V
-#define WANT_BOR_LEVEL (OB_BOR_LEVEL3)
-
-// reference RM0090 section 3.9.10; SPRMOD is 0 meaning PCROP disabled.; DB1M is
-// 0 because we use 2MB dual-bank; BFB2 is 0 allowing boot from flash;
-#define FLASH_OPTCR_VALUE                                                   \
-  ((((~WANT_WRP_SECTORS) << FLASH_OPTCR_nWRP_Pos) & FLASH_OPTCR_nWRP_Msk) | \
-   (WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) | FLASH_OPTCR_nRST_STDBY |       \
-   FLASH_OPTCR_nRST_STOP | FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL)
-
-// reference RM0090 section 3.7.1 table 16
-#define OPTION_BYTES_RDP_USER_VALUE                            \
-  ((uint16_t)((WANT_RDP_LEVEL << FLASH_OPTCR_RDP_Pos) |        \
-              FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_nRST_STOP | \
-              FLASH_OPTCR_WDG_SW | WANT_BOR_LEVEL))
-#define OPTION_BYTES_BANK1_WRP_VALUE ((uint16_t)((~WANT_WRP_SECTORS) & 0xFFFU))
-#define OPTION_BYTES_BANK2_WRP_VALUE ((uint16_t)0xFFFU)
-
-// reference RM0090 section 3.7.1 table 16. use 16 bit pointers because the top
-// 48 bits are all reserved.
-#define OPTION_BYTES_RDP_USER (*(volatile uint16_t* const)0x1FFFC000U)
-#define OPTION_BYTES_BANK1_WRP (*(volatile uint16_t* const)0x1FFFC008U)
-#define OPTION_BYTES_BANK2_WRP (*(volatile uint16_t* const)0x1FFEC008U)
-
-#define FLASH_STATUS_ALL_FLAGS                                            \
-  (FLASH_SR_RDERR | FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR | \
-   FLASH_SR_WRPERR | FLASH_SR_SOP | FLASH_SR_EOP)
-
-static uint32_t flash_wait_and_clear_status_flags(void) {
-  while (FLASH->SR & FLASH_SR_BSY)
-    ;  // wait for all previous flash operations to complete
-  const uint32_t result =
-      FLASH->SR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
-  FLASH->SR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
-  return result;
-}
-
-secbool flash_check_option_bytes(void) {
-  flash_wait_and_clear_status_flags();
-  // check values stored in flash interface registers
-  if ((FLASH->OPTCR & ~3) !=
-      FLASH_OPTCR_VALUE) {  // ignore bits 0 and 1 because they are control bits
-    return secfalse;
-  }
-  if (FLASH->OPTCR1 != FLASH_OPTCR1_nWRP) {
-    return secfalse;
-  }
-
-  mpu_mode_t mode = mpu_reconfig(MPU_MODE_FLASHOB);
-  // check values stored in flash memory
-  if ((OPTION_BYTES_RDP_USER & ~3) !=
-      OPTION_BYTES_RDP_USER_VALUE) {  // bits 0 and 1 are unused
-    mpu_reconfig(mode);
-    return secfalse;
-  }
-  if ((OPTION_BYTES_BANK1_WRP & 0xCFFFU) !=
-      OPTION_BYTES_BANK1_WRP_VALUE) {  // bits 12 and 13 are unused
-    mpu_reconfig(mode);
-    return secfalse;
-  }
-  if ((OPTION_BYTES_BANK2_WRP & 0xFFFU) !=
-      OPTION_BYTES_BANK2_WRP_VALUE) {  // bits 12, 13, 14, and 15 are unused
-    mpu_reconfig(mode);
-    return secfalse;
-  }
-
-  mpu_reconfig(mode);
-
-  return sectrue;
-}
-
-void flash_lock_option_bytes(void) {
-  FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK;  // lock the option bytes
-}
-
-void flash_unlock_option_bytes(void) {
-  if ((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) == 0) {
-    return;  // already unlocked
-  }
-  // reference RM0090 section 3.7.2
-  // write the special sequence to unlock
-  FLASH->OPTKEYR = FLASH_OPT_KEY1;
-  FLASH->OPTKEYR = FLASH_OPT_KEY2;
-  while (FLASH->OPTCR & FLASH_OPTCR_OPTLOCK)
-    ;  // wait until the flash option control register is unlocked
-}
-
-uint32_t flash_set_option_bytes(void) {
-  // reference RM0090 section 3.7.2
-  flash_wait_and_clear_status_flags();
-  flash_unlock_option_bytes();
-  flash_wait_and_clear_status_flags();
-  FLASH->OPTCR1 =
-      FLASH_OPTCR1_nWRP;  // no write protection on any sectors in bank 2
-  FLASH->OPTCR =
-      FLASH_OPTCR_VALUE;  // WARNING: dev board safe unless you compile for
-                          // PRODUCTION or change this value!!!
-  FLASH->OPTCR |= FLASH_OPTCR_OPTSTRT;  // begin committing changes to flash
-  const uint32_t result =
-      flash_wait_and_clear_status_flags();  // wait until changes are committed
-  flash_lock_option_bytes();
-  return result;
-}
-
-secbool flash_configure_option_bytes(void) {
-  if (sectrue == flash_check_option_bytes()) {
-    return sectrue;  // we DID NOT have to change the option bytes
-  }
-
-  do {
-    flash_set_option_bytes();
-  } while (sectrue != flash_check_option_bytes());
-
-  return secfalse;  // notify that we DID have to change the option bytes
-}
-
-#endif  // #ifdef KERNEL_MODE
diff --git a/core/embed/util/option_bytes/stm32u5/option_bytes.c b/core/embed/util/option_bytes/stm32u5/option_bytes.c
deleted file mode 100644
index 94b8ae0ca..000000000
--- a/core/embed/util/option_bytes/stm32u5/option_bytes.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * This file is part of the Trezor project, https://trezor.io/
- *
- * Copyright (c) SatoshiLabs
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <trezor_bsp.h>
-#include <trezor_model.h>
-#include <trezor_rtl.h>
-
-#ifdef SECURE_MODE
-
-#include <util/flash.h>
-#include <util/option_bytes.h>
-
-#pragma GCC optimize( \
-    "no-stack-protector")  // applies to all functions in this file
-
-#if PRODUCTION
-#define WANT_RDP_LEVEL (OB_RDP_LEVEL_2)
-#define WANT_WRP_PAGE_START BOARDLOADER_SECTOR_START
-#define WANT_WRP_PAGE_END BOARDLOADER_SECTOR_END
-#else
-#define WANT_RDP_LEVEL (OB_RDP_LEVEL_0)
-#endif
-
-#ifdef VDD_3V3
-// BOR LEVEL 0: Reset level threshold is around 2.8 V
-#define WANT_BOR_LEVEL (OB_BOR_LEVEL_4)
-#elif VDD_1V8
-// BOR LEVEL 0: Reset level threshold is around 1.7 V
-#define WANT_BOR_LEVEL (OB_BOR_LEVEL_0)
-#else
-#error "VDD_3V3 or VDD_1V8 must be defined"
-#endif
-
-#if defined STM32U5A9xx | defined STM32U5G9xx
-#define WRP_DEFAULT_VALUE 0xFF00FFFF
-#define SEC_WM1R1_DEFAULT_VALUE 0xFF00FF00
-#define SEC_WM1R2_DEFAULT_VALUE 0x7F007F00
-#define SEC_AREA_2_PAGE_START 0xFF
-#define SEC_AREA_2_PAGE_END 0x00
-#elif defined STM32U585xx
-#define WRP_DEFAULT_VALUE 0xFF80FFFF
-#define SEC_WM1R1_DEFAULT_VALUE 0xFF80FF80
-#define SEC_WM1R2_DEFAULT_VALUE 0x7F807F80
-#define SEC_AREA_2_PAGE_START 0x7F
-#define SEC_AREA_2_PAGE_END 0x00
-#else
-#error Unknown MCU
-#endif
-
-_Static_assert(SECRET_SECTOR_START == 0, "secret sector start must be 0");
-#define SEC_AREA_1_PAGE_START SECRET_SECTOR_START
-#define HDP_AREA_1_PAGE_END SECRET_SECTOR_END
-#define SEC_AREA_1_PAGE_END BOARDLOADER_SECTOR_END
-
-#define WRP_LOCKED_VALUE                                       \
-  ((WRP_DEFAULT_VALUE &                                        \
-    ~(FLASH_WRP1AR_UNLOCK_Msk | FLASH_WRP1AR_WRP1A_PSTRT_Msk | \
-      FLASH_WRP1AR_WRP1A_PEND_Msk)) |                          \
-   (WANT_WRP_PAGE_START << FLASH_WRP1AR_WRP1A_PSTRT_Pos) |     \
-   (WANT_WRP_PAGE_END << FLASH_WRP1AR_WRP1A_PEND_Pos))
-
-#define FLASH_OPTR_VALUE                                                \
-  (FLASH_OPTR_TZEN | FLASH_OPTR_PA15_PUPEN | FLASH_OPTR_nBOOT0 |        \
-   FLASH_OPTR_SRAM3_ECC | FLASH_OPTR_DUALBANK | FLASH_OPTR_WWDG_SW |    \
-   FLASH_OPTR_IWDG_STOP | FLASH_OPTR_IWDG_STDBY | FLASH_OPTR_IWDG_SW |  \
-   FLASH_OPTR_SRAM_RST | FLASH_OPTR_nRST_SHDW | FLASH_OPTR_nRST_STDBY | \
-   FLASH_OPTR_nRST_STOP | WANT_BOR_LEVEL |                              \
-   (WANT_RDP_LEVEL << FLASH_OPTR_RDP_Pos))
-
-#define FALSH_SECBOOTADD0R_VALUE \
-  ((BOARDLOADER_START & 0xFFFFFF80) | FLASH_SECBOOTADD0R_BOOT_LOCK | 0x7C)
-
-#define FLASH_SECWM1R1_VALUE                                  \
-  (SEC_AREA_1_PAGE_START << FLASH_SECWM1R1_SECWM1_PSTRT_Pos | \
-   SEC_AREA_1_PAGE_END << FLASH_SECWM1R1_SECWM1_PEND_Pos |    \
-   SEC_WM1R1_DEFAULT_VALUE)
-#define FLASH_SECWM1R2_VALUE                             \
-  (HDP_AREA_1_PAGE_END << FLASH_SECWM1R2_HDP1_PEND_Pos | \
-   FLASH_SECWM1R2_HDP1EN | SEC_WM1R2_DEFAULT_VALUE)
-
-#define FLASH_SECWM2R1_VALUE                                  \
-  (SEC_AREA_2_PAGE_START << FLASH_SECWM1R1_SECWM1_PSTRT_Pos | \
-   SEC_AREA_2_PAGE_END << FLASH_SECWM1R1_SECWM1_PEND_Pos |    \
-   SEC_WM1R1_DEFAULT_VALUE)
-#define FLASH_SECWM2R2_VALUE (SEC_WM1R2_DEFAULT_VALUE)
-
-#define FLASH_STATUS_ALL_FLAGS \
-  (FLASH_NSSR_PGSERR | FLASH_NSSR_PGAERR | FLASH_NSSR_WRPERR | FLASH_NSSR_EOP)
-
-static uint32_t flash_wait_and_clear_status_flags(void) {
-  while (FLASH->NSSR & FLASH_NSSR_BSY)
-    ;  // wait for all previous flash operations to complete
-
-  uint32_t result =
-      FLASH->NSSR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
-  FLASH->NSSR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
-
-#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  while (FLASH->SECSR & FLASH_SECSR_BSY)
-    ;  // wait for all previous flash operations to complete
-  result |=
-      FLASH->SECSR & FLASH_STATUS_ALL_FLAGS;  // get the current status flags
-  FLASH->SECSR |= FLASH_STATUS_ALL_FLAGS;     // clear all status flags
-#endif
-  return result;
-}
-
-secbool flash_check_option_bytes(void) {
-  flash_wait_and_clear_status_flags();
-  // check values stored in flash interface registers
-  if (FLASH->OPTR !=
-      FLASH_OPTR_VALUE) {  // ignore bits 0 and 1 because they are control bits
-    return secfalse;
-  }
-
-  if (FLASH->SECBOOTADD0R != FALSH_SECBOOTADD0R_VALUE) {
-    return secfalse;
-  }
-
-#if PRODUCTION
-  if (FLASH->WRP1AR != WRP_LOCKED_VALUE) {
-    return secfalse;
-  }
-#else
-  if (FLASH->WRP1AR != WRP_DEFAULT_VALUE) {
-    return secfalse;
-  }
-#endif
-
-  if (FLASH->WRP1BR != WRP_DEFAULT_VALUE) {
-    return secfalse;
-  }
-  if (FLASH->WRP2AR != WRP_DEFAULT_VALUE) {
-    return secfalse;
-  }
-  if (FLASH->WRP2BR != WRP_DEFAULT_VALUE) {
-    return secfalse;
-  }
-
-  if (FLASH->SECWM1R1 != FLASH_SECWM1R1_VALUE) {
-    return secfalse;
-  }
-  if (FLASH->SECWM1R2 != FLASH_SECWM1R2_VALUE) {
-    return secfalse;
-  }
-  if (FLASH->SECWM2R1 != FLASH_SECWM2R1_VALUE) {
-    return secfalse;
-  }
-  if (FLASH->SECWM2R2 != FLASH_SECWM2R2_VALUE) {
-    return secfalse;
-  }
-
-  return sectrue;
-}
-
-void flash_lock_option_bytes(void) {
-  FLASH->NSCR |= FLASH_NSCR_OPTLOCK;  // lock the option bytes
-}
-
-void flash_unlock_option_bytes(void) {
-  if ((FLASH->NSCR & FLASH_NSCR_OPTLOCK) == 0) {
-    return;  // already unlocked
-  }
-  // reference RM0090 section 3.7.2
-  // write the special sequence to unlock
-  FLASH->OPTKEYR = FLASH_OPTKEY1;
-  FLASH->OPTKEYR = FLASH_OPTKEY2;
-  while (FLASH->NSCR & FLASH_NSCR_OPTLOCK)
-    ;  // wait until the flash option control register is unlocked
-}
-
-uint32_t flash_set_option_bytes(void) {
-  if (flash_unlock_write() != sectrue) {
-    return 0;
-  }
-  flash_wait_and_clear_status_flags();
-  flash_unlock_option_bytes();
-  flash_wait_and_clear_status_flags();
-
-  FLASH->SECBOOTADD0R = FALSH_SECBOOTADD0R_VALUE;
-
-  FLASH->SECWM1R1 = FLASH_SECWM1R1_VALUE;
-  FLASH->SECWM1R2 = FLASH_SECWM1R2_VALUE;
-
-  FLASH->SECWM2R1 = FLASH_SECWM2R1_VALUE;
-  FLASH->SECWM2R2 = FLASH_SECWM2R2_VALUE;
-
-#if PRODUCTION
-  FLASH->WRP1AR = WRP_LOCKED_VALUE;
-#else
-  FLASH->WRP1AR = WRP_DEFAULT_VALUE;
-#endif
-  FLASH->WRP1BR = WRP_DEFAULT_VALUE;
-  FLASH->WRP2AR = WRP_DEFAULT_VALUE;
-  FLASH->WRP2BR = WRP_DEFAULT_VALUE;
-
-  // Set the OEM keys to the default value
-  // In case these are for any reason set, we will reset them to the default
-  // while locking the device, to ensure that there is no ability to reverse the
-  // RDP. These keys are write-only, so the only way to check that the keys are
-  // not set is through OEMxLOCK bits in FLASH->NSSR register. These bits are
-  // unset only if the keys are written to 0xFFFFFFFF.
-  FLASH->OEM1KEYR1 = 0xFFFFFFFF;
-  FLASH->OEM1KEYR2 = 0xFFFFFFFF;
-  FLASH->OEM2KEYR1 = 0xFFFFFFFF;
-  FLASH->OEM2KEYR2 = 0xFFFFFFFF;
-
-  FLASH->OPTR =
-      FLASH_OPTR_VALUE;  // WARNING: dev board safe unless you compile for
-  // PRODUCTION or change this value!!!
-
-  FLASH_WaitForLastOperation(HAL_MAX_DELAY);
-
-  FLASH->NSCR |= FLASH_NSCR_OPTSTRT;
-  uint32_t result =
-      flash_wait_and_clear_status_flags();  // wait until changes are committed
-
-  FLASH_WaitForLastOperation(HAL_MAX_DELAY);
-
-  FLASH->NSCR |= FLASH_NSCR_OBL_LAUNCH;  // begin committing changes to flash
-  result =
-      flash_wait_and_clear_status_flags();  // wait until changes are committed
-  flash_lock_option_bytes();
-
-  if (flash_lock_write() != sectrue) {
-    return 0;
-  }
-  return result;
-}
-
-void check_oem_keys(void) {
-  ensure(((FLASH->NSSR & FLASH_NSSR_OEM1LOCK) == 0) * sectrue, "OEM1 KEY SET");
-  ensure(((FLASH->NSSR & FLASH_NSSR_OEM2LOCK) == 0) * sectrue, "OEM2 KEY SET");
-}
-
-secbool flash_configure_option_bytes(void) {
-  if (sectrue == flash_check_option_bytes()) {
-    return sectrue;  // we DID NOT have to change the option bytes
-  }
-
-  do {
-    flash_set_option_bytes();
-  } while (sectrue != flash_check_option_bytes());
-
-  check_oem_keys();
-
-  return secfalse;  // notify that we DID have to change the option bytes
-}
-
-#endif  // SECURE_MODE
diff --git a/core/site_scons/models/stm32f4_common.py b/core/site_scons/models/stm32f4_common.py
index 844280481..7fa7226dc 100644
--- a/core/site_scons/models/stm32f4_common.py
+++ b/core/site_scons/models/stm32f4_common.py
@@ -14,6 +14,7 @@ def stm32f4_common_files(env, features_wanted, defines, sources, paths):
         "embed/io/notify/inc",
         "embed/io/tsqueue/inc",
         "embed/sec/monoctr/inc",
+        "embed/sec/option_bytes/inc",
         "embed/sec/random_delays/inc",
         "embed/sec/rng/inc",
         "embed/sec/secure_aes/inc",
@@ -36,7 +37,6 @@ def stm32f4_common_files(env, features_wanted, defines, sources, paths):
         "embed/util/cpuid/inc",
         "embed/util/flash/inc",
         "embed/util/fwutils/inc",
-        "embed/util/option_bytes/inc",
         "vendor/micropython/lib/cmsis/inc",
         "vendor/micropython/lib/stm32lib/STM32F4xx_HAL_Driver/Inc",
         "vendor/micropython/lib/stm32lib/CMSIS/STM32F4xx/Include",
@@ -70,6 +70,7 @@ def stm32f4_common_files(env, features_wanted, defines, sources, paths):
         "embed/io/tsqueue/tsqueue.c",
         "embed/sec/board_capabilities/stm32/board_capabilities.c",
         "embed/sec/monoctr/stm32f4/monoctr.c",
+        "embed/sec/option_bytes/stm32f4/option_bytes.c",
         "embed/sec/random_delays/stm32/random_delays.c",
         "embed/sec/rng/rng_strong.c",
         "embed/sec/secret/stm32f4/secret.c",
@@ -107,7 +108,6 @@ def stm32f4_common_files(env, features_wanted, defines, sources, paths):
         "embed/util/flash/stm32f4/flash_layout.c",
         "embed/util/flash/stm32f4/flash_otp.c",
         "embed/util/fwutils/fwutils.c",
-        "embed/util/option_bytes/stm32f4/option_bytes.c",
     ]
 
     if "dbg_console" in features_wanted:
diff --git a/core/site_scons/models/stm32u5_common.py b/core/site_scons/models/stm32u5_common.py
index 114e89e71..c28aee362 100644
--- a/core/site_scons/models/stm32u5_common.py
+++ b/core/site_scons/models/stm32u5_common.py
@@ -16,6 +16,7 @@ def stm32u5_common_files(env, features_wanted, defines, sources, paths):
         "embed/sec/board_capabilities/inc",
         "embed/sec/hash_processor/inc",
         "embed/sec/monoctr/inc",
+        "embed/sec/option_bytes/inc",
         "embed/sec/random_delays/inc",
         "embed/sec/rng/inc",
         "embed/sec/secret/inc",
@@ -39,7 +40,6 @@ def stm32u5_common_files(env, features_wanted, defines, sources, paths):
         "embed/util/cpuid/inc",
         "embed/util/flash/inc",
         "embed/util/fwutils/inc",
-        "embed/util/option_bytes/inc",
         "vendor/stm32u5xx_hal_driver/Inc",
         "vendor/cmsis_device_u5/Include",
         "vendor/cmsis_5/CMSIS/Core/Include",
@@ -93,6 +93,7 @@ def stm32u5_common_files(env, features_wanted, defines, sources, paths):
         "embed/sec/board_capabilities/stm32/board_capabilities.c",
         "embed/sec/hash_processor/stm32u5/hash_processor.c",
         "embed/sec/monoctr/stm32u5/monoctr.c",
+        "embed/sec/option_bytes/stm32u5/option_bytes.c",
         "embed/sec/random_delays/stm32/random_delays.c",
         "embed/sec/rng/rng_strong.c",
         "embed/sec/secret/stm32u5/secret.c",
@@ -136,7 +137,6 @@ def stm32u5_common_files(env, features_wanted, defines, sources, paths):
         "embed/util/flash/stm32u5/flash_layout.c",
         "embed/util/flash/stm32u5/flash_otp.c",
         "embed/util/fwutils/fwutils.c",
-        "embed/util/option_bytes/stm32u5/option_bytes.c",
     ]
 
     if "dbg_console" in features_wanted: