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Informational 16 Bitcoin

hashes: Add 8-way AVX2 SHA256d for 64-byte input

Public commit record

What the developer wrote

Authored by jrakibi

68/100 · Adequate
hashes: Add 8-way AVX2 SHA256d for 64-byte input

add the three transforms for sha256(sha256(64_bytes)) using AVX2
SIMD.

AVX2 uses 256-bit registers, so we can pack eight 32-bit words into
each register and compute 8 independent hashes in parallel with a
single SIMD op.

- Transforms 1 & 2 compute the inner `sha256(64_bytes)`.
- Transform 3 computes sha256(output_of_T1_and_T2).

rounds are fully unrolled (we will use a round! macro to fold them
in the next patch).
✓ Descriptive subject✓ Names a concrete action or component✓ Provides detailed explanatory context
The short version

What changed, and why it matters

This commit adds a new, highly optimized implementation of the SHA256d hashing algorithm for 64-byte inputs, using Intel AVX2 processor instructions. It is a pure performance optimization that computes eight hashes at once. There is no indication in the commit that it fixes a security bug; it simply adds a faster code path.

Recommended action

Treat as a routine performance optimization. Reviewers should verify that any future caller performs runtime AVX2 capability detection before invoking this `unsafe` function, and that the implementation is covered by test vectors matching the existing SHA256d output. No immediate security action is required based on this commit alone.

Security signals we found

01

New unsafe SIMD code using `core::arch::x86_64` AVX2 intrinsics

02

Function marked `unsafe` and `#[target_feature(enable = "avx,avx2")]`, requiring correct CPU feature detection at call sites

03

No runtime CPU feature dispatch or caller visible in this commit

04

No security relevance, CVE reference, or bug fix described in commit message

Risk score

Why this scored 16/100

Our methodology →
Potential impact 0/30
Exploitability 0/25
Stealth signal 0/15
Affected reach 5/15
Confidence 8/10
Evidence quality 3/5
Human-validated context

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