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Low 49 Bitcoin

Fix timer interrupt race

Public commit record

What the developer wrote

Authored by Marko Bencun

51/100 · Thin
Fix timer interrupt race

The production timer future shared its state through a RefCell, but
that state is touched from two different contexts: the poll_fn closure
runs in normal Rust task context, while the timer callback can run
from the hardware timer interrupt path.

If the interrupt fired while the future was polling, both sides could
try to take a mutable RefCell borrow at the same time. RefCell only
protects against reentrant borrowing within one thread of execution;
it is not a synchronization primitive for interrupt-vs-task access.
That made the timer future racy and able to fail nondeterministically
even with only one delay future in flight.
✓ Subject identifies a change✓ Provides detailed explanatory context
The short version

What changed, and why it matters

This commit fixes a race condition in the BitBox02 hardware wallet's Rust-based timer code. The old code used a Rust borrow-checker helper (RefCell) to share state between normal code and a hardware timer interrupt. RefCell is not safe across interrupts, so if the timer fired while the code was checking the timer, both sides could try to modify the same data at once, leading to unpredictable failures or panics. The fix replaces the shared state with proper atomic variables and an atomic waker, which are designed for interrupt-safe concurrency.

Recommended action

Treat this as a reliability and potential denial-of-service hardening fix. Verify that all async timer/delay users exercise the new atomic path, and consider adding a targeted test that simulates an interrupt firing during polling. Review other Rust code that shares state with interrupt handlers for similar RefCell misuse.

Security signals we found

01

interrupt-vs-task race condition in timer future

02

use of non-thread-safe/non-interrupt-safe RefCell for shared mutable state

03

potential panic or nondeterministic failure of delay futures

04

replacement with AtomicBool and AtomicWaker for correct memory ordering

05

register-then-recheck pattern to close lost-wakeup window

Risk score

Why this scored 49/100

Our methodology →
Potential impact 12/30
Exploitability 8/25
Stealth signal 10/15
Affected reach 8/15
Confidence 7/10
Evidence quality 4/5
Human-validated context

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